Field of the Disclosure
The present disclosure relates in general to semiconductor devices, and more specifically to capacitive storage for latch redundancy.
Description of the Related Art
As transistors dimensions shrink to enable smaller electronic devices, the possibility of failures induced by soft errors and/or single event upset (SEU) increases. SEU can occur, for example, when external energy (such as energy due to radiation particle bombardment) is imparted onto the circuit, causing values in a latch, memory, voltage detectors and/or other devices, to change to erroneous values. Therefore, as device geometries continue to shrink, redundancy becomes increasingly important. Additionally, it is important to reduce power and area consumed by redundant circuitry so that energy costs are reduced and portable devices can be made smaller and operate for longer time periods between battery recharges.